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− | === Caractéristiques I/O === | + | === Caractéristiques des entrées/sortie (I/O) === |
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| These specifications are based on the STM32F205RG datasheet, with reference to Photon pin nomenclature. | | These specifications are based on the STM32F205RG datasheet, with reference to Photon pin nomenclature. |
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| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
− | | align="center" style="background:#f0f0f0;"|'''Parameter''' | + | | align="center" style="background:#f0f0f0;"|'''Paramètre''' |
− | | align="center" style="background:#f0f0f0;"|'''Symbol''' | + | | align="center" style="background:#f0f0f0;"|'''Symbole''' |
| | align="center" style="background:#f0f0f0;"|'''Conditions''' | | | align="center" style="background:#f0f0f0;"|'''Conditions''' |
| | align="center" style="background:#f0f0f0;"|'''Min''' | | | align="center" style="background:#f0f0f0;"|'''Min''' |
| | align="center" style="background:#f0f0f0;"|'''Typ''' | | | align="center" style="background:#f0f0f0;"|'''Typ''' |
| | align="center" style="background:#f0f0f0;"|'''Max''' | | | align="center" style="background:#f0f0f0;"|'''Max''' |
− | | align="center" style="background:#f0f0f0;"|'''Unit''' | + | | align="center" style="background:#f0f0f0;"|'''Unité''' |
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− | | Standard I/O input low level voltage ||VIL ||||-0.3 ||||0.28*(V3V3-2)+0.8 ||V | + | | Tension d'entrée minimal standard pour un I/O<br />Standard I/O input low level voltage ||VIL ||||-0.3 ||||0.28*(V3V3-2)+0.8 ||V |
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− | | I/O FT[1] input low level voltage ||VIL ||||-0.3 ||||0.32*(V3V3-2)+0.75 ||V | + | | Tension d'entrée minimal pour un I/O tolérante à 5V<br />I/O FT[1] input low level voltage ||VIL ||||-0.3 ||||0.32*(V3V3-2)+0.75 ||V |
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− | | Standard I/O input high level voltage ||VIH ||||0.41*(V3V3-2)+1.3 ||||V3V3+0.3 ||V | + | | Tension d'entrée maximale standard pour un I/O<br />Standard I/O input high level voltage ||VIH ||||0.41*(V3V3-2)+1.3 ||||V3V3+0.3 ||V |
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− | | I/O FT[1] input high level voltage ||VIH ||V3V3 > 2V ||0.42*(V3V3-2)+1 ||||5.5 ||V | + | | Tension d'entrée maximale pour un I/O tolérante à 5V<br />I/O FT[1] input high level voltage ||VIH ||V3V3 > 2V ||0.42*(V3V3-2)+1 ||||5.5 ||V |
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| | ||VIH ||V3V3 ≤ 2V ||0.42*(V3V3-2)+1 ||||5.2 ||V | | | ||VIH ||V3V3 ≤ 2V ||0.42*(V3V3-2)+1 ||||5.2 ||V |
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− | | Standard I/O Schmitt trigger voltage hysteresis[2] ||Vhys ||||200 ||||||mV | + | | Tension d'hystérésis standard du Schmitt trigger sur les I/O[2] ||Vhys ||||200 ||||||mV |
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− | | I/O FT Schmitt trigger voltage hysteresis[2] ||Vhys ||||5% V3V3[3] ||||||mV | + | | Tension d'hystérésis standard du Schmitt trigger sur les I/O tolérante à 5V<br />I/O FT Schmitt trigger voltage hysteresis[2] ||Vhys ||||5% V3V3[3] ||||||mV |
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− | | Input leakage current[4] ||Ilkg ||GND ≤ Vio ≤ V3V3 GPIOs ||||||±1 ||µA | + | | Courant de perte d'entrée<br />Input leakage current[4] ||Ilkg ||GND ≤ Vio ≤ V3V3 GPIOs ||||||±1 ||µA |
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− | | Input leakage current[4] ||Ilkg ||RPU ||Vio = 5V, I/O FT ||||3 ||µA | + | | Courant de perte d'entrée<br />Input leakage current[4] ||Ilkg ||RPU ||Vio = 5V, I/O FT ||||3 ||µA |
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− | | Weak pull-up equivalent resistor[5] ||RPU ||Vio = GND ||30 ||40 ||50 ||k Ω | + | | Résistance pull-up équivalente<br />Weak pull-up equivalent resistor[5] ||RPU ||Vio = GND ||30 ||40 ||50 ||k Ω |
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− | | Weak pull-down equivalent resistor[5] ||RPD ||Vio = V3V3 ||30 ||40 ||50 ||k Ω | + | | Résistance pull-down équivalente<br />Weak pull-down equivalent resistor[5] ||RPD ||Vio = V3V3 ||30 ||40 ||50 ||k Ω |
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− | | I/O pin capacitance ||CIO ||||||5 ||||pF | + | | Capacitance d'une broche I/O ||CIO ||||||5 ||||pF |
| |} | | |} |
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| {{underline|Notes:}} | | {{underline|Notes:}} |
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− | [1] FT = Five-volt tolerant. In order to sustain a voltage higher than V3V3+0.3 the internal pull-up/pull-down resistors must be disabled. | + | [1] FT = ''Five-volt tolerant'' Tolérant 5 volts. '''La résistance pull-up interne doit être désactivée''' de manière a pouvoir supporter une tension d'entrée supérieure à V3V3+0.3. |
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− | [2] Hysteresis voltage between Schmitt trigger switching levels. Based on characterization, not tested in production. | + | [2] Tension d'hystéresis entre les niveaux de basculement du trigger de Schmitt. Basé sur les caractéristiques, non testé en production. |
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− | [3] With a minimum of 100mV. | + | [3] Avec un minimum de 100mV. |
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− | [4] Leakage could be higher than max. if negative current is injected on adjacent pins. | + | [4] La perte (''Leakage'') peut être plus grande que le maximum si un courant négatif est injecté sur la broche adjacente. |
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− | [5] Pull-up and pull-down resistors are designed with a true resistance in series with switchable PMOS/NMOS. This PMOS/NMOS contribution to the series resistance is minimum (~10% order). | + | [5] Les résistances Pull-up et pull-down sont conçue avec de vraies résistance en série avec un PMOS/NMOS activable. La contribution du PMOS/NMOS à la résistance série est minimaliste (de l'ordre de ~10%). |
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| == Diagrammes == | | == Diagrammes == |